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MAROC: Multi Anode Read Out Chip
ASIC description:
MAROC is a Multi Anode
ReadOut Chip.
This ASIC is an evolution of the 32 channels OPERA_ROC ASIC developed
and installed on the OPERA experiment to auto-trigger and readout 64
channels Hamamatsu multi anode PMTs. MAROC is expected to discriminate
the 64 channels PMT signals and produce 64 corresponding trigger
outputs. The charge measurement is also available.
The requirements of MAROC were defined by the ones given to the electronic chain of the
ATLAS luminometer
for which this chip was designed at first. In order to have the best
detection efficiency a 100% trigger rate for signal greater than 1/3
photoelectron is required. This corresponds to a charge of 50fC for a
PMT functioning at a gain of 106 (High Voltage = 900 V). The noise is
expected to be less than 2fC. The crosstalk between neighboring
channels should be better than 1%. Additionally the charge measurement
should be feasible up to a signal of 30 photoelectrons with a linearity
of 2%.
The second
version (MAROC 2) was submitted in March 2006 and received in July of
the same year. It has been designed using the AMS SiGe 0.35 μm
technology. The package used is CQFP240. The area of the chip is 15.6
mm2 (4 mm × 3.9 mm).
The chip has 64 “super
common base” inputs, 64 trigger outputs, an analog and a digital
multiplexed charge output. Each channel is made of a variable gain
preamplifier with low input tunable impedance (50-100 Ω), a low offset
and a low bias current (20 μA) in order to minimize the cross talk.
This variable gain allows reaching one of the requirements by
compensating the PM gain dispersion up to a factor 4 to an accuracy of
6% with 6 bits. The amplified current feeds then two paths:
- A slow shaper path which consists in a
CRRC2 shaper and two Sample and Hold Widlar differential buffers. These
two S&H (1 and 2) blocks can measure and then store the baseline
and the charge in a 2 pF capacitor. Finally an analog multiplexed
charge measurement is delivered with a 5 MHz readout speed. A digital
version of this measurement is also furnished by a 12 bit ADC Wilkinson.
- A fast
(15 ns) shaper path with two possible fast shapers and followed by one
discriminator (low offset comparator) that delivers the trigger output.
Two other discriminators are implemented to trig for different
thresholds so a 2 bits encoded trigger outputs has to be used. The
thresholds are set by three internal 10 bit DACs composed by a 4 bits
thermometer DAC allowing coarse tuning (200 mV per step) and a 7 bits
mirror DAC used for fine tuning (3 mV per step).
Documents:
Test board and related documents:
Talks, posters and papers:
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