AIDA Meeting - CCLRC RAL - 24 October 2006 ------------------------------------------ Present: Tom Davinson, Zhong Liu Edinburgh Rob Page Liverpool John Simpson, Ian Lazarus (by phone) CCLRC DL Stephen Thomas CCLRC RAL Summary of meeting ------------------ Discussion of first draft of the AIDA Technical Specification. It was agreed that a revised draft would be circulated prior to the next AIDA meeting and assuming no major problems it would then be circulated fairly widely to the HISPEC/DESPEC collaboration for comment. RDP suggested that in order to observe the lowest decay-decay correlation times we should consider using sampling ADCs and digital signal processing. IL indicated that Analog Devices Inc had recently announced an Octal, 50MSPS, 12-bit ADC (AD9222-50) which approached the channel pitch required. It was agreed that we should keep our options open and that the prototype ASIC would include the option to connect a sampling ADC directly to the ASIC preamplifier output, in addition to the conventional shaper, peak detect & hold signal processing. SLT presented a noise analysis and noise optimisation strategy for the AIDA ASIC. He concluded that the noise specifications for the AIDA ASIC are "not unreasonable". T.Davinson - 1.12.06 Note - Analog Devices AD9222-50 Octal, 50MSPS, 12-bit,<100mW/channel $44+tax/1000 Analog Devices AD9252 Octal, 50MSPS, 14-bit,<100mW/channel $54+tax/1000